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SDSoC Environment, Node Locked License


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ARM, MicroBlaze

ARM, Zynq-7000, Zynq UltraScale+MPSoC




Linux, Windows


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CAD Models - Notice
CAD Models and drawings are provided to you on a revocable limited licence for your internal use only but remain the property of the manufacturer who retain all intellectual property rights and ownership. They are provided to assist you in decision making and as design guide but are not guaranteed to be error free, accurate or up to date and is not intended to be taken as advice.
Use of these CAD models and other options provided are downloaded and used entirely at your own risk and by continuing you confirm acceptance of the above.

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Product Overview

The EF-SDSOC-FL from Xilinx is a SDSoC™ (software defined system-on-chip) Development Environment with floating license. It provides familiar embedded C/C++/OpenCL application development experience including an easy to use Eclipse IDE and a comprehensive design environment for heterogeneous Zynq® All Programmable SoC and multiprocessor system-on-chip deployment. Complete with industry's first C/C++/OpenCL full-system optimizing compiler, SDSoC delivers system level profiling, automated software acceleration in programmable logic, automated system connectivity generation and libraries to speed programming. It also enables end user and third party platform developers to rapidly define, integrate and verify system level solutions and enable their end customers with a customized programming environment. Xilinx OpenCV libraries are now available featuring 50+ hardware optimized OpenCV functions including Gausian, Median, Bilateral, Harris corner, Canny edge detection, HoG, SVM, LK Optical Flow and many more.
  • Accelerate a function in programmable logic (PL) with a click of button
  • Supports bare metal, Linux and FreeRTOS as target OS
  • Rapid performance estimation, area estimation including PS, data communication and PL in minutes
  • Automated run time instrumentation of cache, memory and bus utilizations
  • Enables early and rapid generation and exploration for optimal total system architecture
  • Optimizes system connectivity, allow rapid system exploration of throughput, latency, area trade-off
  • Automatic function acceleration in programmable logic generating both ARM software, FPGA bitstream
  • Compiles C/C++/OpenCL applications into a fully functional Zynq SoC and multiprocessor system-on-chip system


Embedded Design & Development


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