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SI5330C-B00207-GM

Clock Buffer, Level Translator, 250 MHz, 2.97 V to 3.63 V, 4 Outputs, QFN-24

SILICON LABS SI5330C-B00207-GM
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Producentens varenummer:
SI5330C-B00207-GM
Varenummer:
2421767
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Produktoversigt

The SI5330C-B00207-GM is a low-jitter low-skew Fan-out Buffer optimized for high-performance PCB clock distribution applications. The device produces four differential or eight single-ended, low-jitter output clocks from a single input clock. The input can accept either a single-ended or a differential clock allowing the device to function as a clock level translator. It supports single-ended output formats of CMOS, SSTL and HSTL and differential formats of LVDS, LVPECL and HCSL. It is normally required that the LVDS driver be dc-coupled to the 100R termination at the receiver end. If your application requires an accoupled 100R load, contact the applications team for advice. It can accept single-ended and differential input clocks.
  • Supports single-ended or differential input clock signals
  • Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) output
  • Provides signal level translation
  • Loss of signal (LOS) indicator allows system clock monitoring
  • Output enable (OEB) pin allows glitchless control of output clocks
  • 100ps Output-output skew
  • 150fs RMS typical additive jitter

Applikationer

Communications & Networking, Fibre Optics, Clock & Timing

Advarsler

Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.

Produktoplysninger

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:
Clock Buffer, Level Translator

:
250MHz

:
4Outputs

:
2.97V

:
3.63V

:
QFN

:
24Pins

:
-40°C

:
85°C

:
-

:
-

:
MSL 2 - 1 year

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Tekniske dokumenter (2)

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Use of these CAD models and other options provided are downloaded and used entirely at your own risk and by continuing you confirm acceptance of the above.

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